dc.contributor.author |
Maheshwari, Om |
|
dc.contributor.author |
Singh, Aishwarya |
|
dc.contributor.author |
Mohapatra, Nihar Ranjan |
|
dc.contributor.other |
8th IEEE Electron Devices Technology and Manufacturing Conference (EDTM 2024) |
|
dc.coverage.spatial |
India |
|
dc.date.accessioned |
2024-05-16T14:32:40Z |
|
dc.date.available |
2024-05-16T14:32:40Z |
|
dc.date.issued |
2024-03-03 |
|
dc.identifier.citation |
Maheshwari, Om; Singh, Aishwarya and Mohapatra, Nihar Ranjan, "Training free parameter extraction for compact device models using sequential Bayesian optimization", in the 8th IEEE Electron Devices Technology and Manufacturing Conference (EDTM 2024), Bangalore, IN, Mar. 03-06, 2024. |
|
dc.identifier.uri |
https://doi.org/10.1109/EDTM58488.2024.10511311 |
|
dc.identifier.uri |
https://repository.iitgn.ac.in/handle/123456789/10054 |
|
dc.description.abstract |
This work presents a computationally efficient approach to extract the compact model parameters without extensive training requirements. Bayesian optimization is employed in multiple stages to optimize different model parameters. The methodology is demonstrated on Virtual Source model (MVS 2.0), extended for Nanosheet FET and MoS 2 based 2DFET. Optimization function based on I-V characteristics slope, on and off currents ensures optimum fitting of global as well as local model parameters for diverse devices. |
|
dc.description.statementofresponsibility |
by Om Maheshwari, Aishwarya Singh and Nihar Ranjan Mohapatra |
|
dc.language.iso |
en_US |
|
dc.publisher |
Institute of Electrical and Electronics Engineers (IEEE) |
|
dc.subject |
Parameter extraction |
|
dc.subject |
Bayesian optimization |
|
dc.subject |
Compact model |
|
dc.subject |
Virtual source |
|
dc.subject |
Nanosheet FET |
|
dc.subject |
2DFET |
|
dc.title |
Training free parameter extraction for compact device models using sequential Bayesian optimization |
|
dc.type |
Conference Paper |
|