Sub-nanosecond delay high voltage level shifter in 0.18?m HV-CMOS technology for cryo-cooler electronics

Abstract

This paper presents a high-voltage level shifter for driving high-power cryo-coolers. the high-voltage level shifters typically suffer from reliability concerns, large voltage swing nodes, and high propagation dalay. In the proposed design, these limitations are overcome using capacitively coupled architecture, with techniques to accommodate On-chip high voltage capaci-tors. The design includes a reliable start-up circuit for reducing dynamic power. The proposed design provides level shifting with 0.84ns delay across temperature and process corners with 100fF capacitive load. The rise/fall delay variation has been matched within<4% across all process corners. The circuit occupies 450μm area, including the On-chip MIM capacitor,and consumes 160μW to 1.56mW for a supply voltage range of 10V to 60V.