Accelerated bit slicing technique for in-memory computing using multi-input resistive random access memory

Abstract

Recently, there has been a strong focus on enhancing computing efficiency with emerging memristor devices. In this paper, we propose accelerated bit-slicing technique using multi-input memristor in crossbar arrays. First, we demonstrate bit slicing in standard 2-terminal(T) PCMORRAM, wherein each bit (of n-bit input) is serially computed. Second, we introduce 3T-RRAM (two-inputs), allowing simultaneous computation of 2-bits resulting in reduction of processing cycles. Lastly, accelerated computation of 6-bit input in 3-cycles is demonstrated with 3T-RRAM.