Abstract:
This paper proposes a dead-time control circuit to generate independent and adaptive delays for the rise and fall time duration. The circuit comprises a rise/fall time detector, rise/fall time to voltage converter and switch capacitor-based charge integrator block to generate the adaptive dead-time. The proposed adaptive dead-time controller design implemented using a 0.18μm HV CMOS process, occupies 170μm x 90μm silicon area. The results show good accuracy in the dead-time generation with an error <±3.5ns. In post-layout simulation, the design provides sinusoidal output with a very low offset voltage of 70mV.