| dc.contributor.author |
Bhoir, Mandar S. |
|
| dc.contributor.author |
Mohapatra, Nihar Ranjan |
|
| dc.coverage.spatial |
India |
|
| dc.date.accessioned |
2025-04-25T05:28:32Z |
|
| dc.date.available |
2025-04-25T05:28:32Z |
|
| dc.date.issued |
2019-04-13 |
|
| dc.identifier.citation |
Bhoir, Mandar S. and Mohapatra, Nihar Ranjan, "A source side underlap lateral DMOS transistor and method of fabricating thereof", Indian Patent Office (IPO), Patent Application No.: 201921014956, Apr. 13, 2019. |
|
| dc.identifier.uri |
https://repository.iitgn.ac.in/handle/123456789/11301 |
|
| dc.description.statementofresponsibility |
by Mandar S. Bhoir and Nihar Ranjan Mohapatra |
|
| dc.language.iso |
en_US |
|
| dc.title |
A source side underlap lateral DMOS transistor and method of fabricating thereof |
|
| dc.type |
Patents Filed/Published |
|
| dc.relation.journal |
Indian Patent Office (IPO) |
|