dc.contributor.author |
Singh, Harshvardhan |
|
dc.contributor.author |
Solanki, Nirmal |
|
dc.contributor.author |
Maskeen, Jaskirat Singh |
|
dc.contributor.author |
Lashkare, Sandip |
|
dc.coverage.spatial |
United States of America |
|
dc.date.accessioned |
2025-05-16T05:55:33Z |
|
dc.date.available |
2025-05-16T05:55:33Z |
|
dc.date.issued |
2025-05 |
|
dc.identifier.citation |
Singh, Harshvardhan; Solanki, Nirmal; Maskeen, Jaskirat Singh and Lashkare, Sandip, "Asynchronous real-time learning in spiking neural network using 3-terminal resistance random access memory", TechRxiv, IEEE, DOI: 10.36227/techrxiv.174613015.58997908, May 2025. |
|
dc.identifier.uri |
https://doi.org/10.36227/techrxiv.174613015.58997908/v1 |
|
dc.identifier.uri |
https://repository.iitgn.ac.in/handle/123456789/11424 |
|
dc.description.abstract |
Spiking Neural Networks, inspired by the human brain, are promising as they attempt to solve real-life complex problems, such as pattern recognition, at low energy consumption. Resistance Random Access Memory (RRAM) crossbar array to simulate synaptic weight dynamics, combined with external neuron control circuits, presents a promising approach. The crossbar array of the multilevel resistive memory supports more than two states (LRS and HRS), enhancing RRAM's functionality for analog signals and enabling brain-like processing. However, Reading utilizes low voltage to maintain conductance stability, while writing requires high voltage. Hence, a simultaneous, asynchronous read-write, akin to the brain, remains a significant challenge. Although various solutions exist, a simple, areaefficient solution with low circuit overhead is still challenging. In this paper, a 3-terminal Pr0.7Ca0.3MnO3 (PCMO) RRAM is proposed to enable simultaneous writing and reading, overcoming read-write conflicts of two-terminal RRAM. The typical two terminals of resistive 3T-RRAM are used for writing, and the third terminal is for reading, ensuring real-time asynchronous learning operation. Such an SNN with real-time learning can be advantageous as it reduces circuit overhead and the learning time. |
|
dc.description.statementofresponsibility |
by Harshvardhan Singh, Nirmal Solanki, Jaskirat Singh Maskeen and Sandip Lashkare |
|
dc.language.iso |
en_US |
|
dc.publisher |
Institute of Electrical and Electronics Engineers (IEEE) |
|
dc.subject |
Spiking neural network |
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dc.subject |
RRAM |
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dc.subject |
Crossbar array |
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dc.subject |
Neuromorphic engineering |
|
dc.subject |
Spiking neural networks |
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dc.subject |
Spike-timing dependent plasticity |
|
dc.title |
Asynchronous real-time learning in spiking neural network using 3-terminal resistance random access memory |
|
dc.type |
Article |
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dc.relation.journal |
TechRxiv |
|