Design of High Resolution Low Power ADC

Abstract

Analog to digital converters are frequently used in imaging payloads developed for different satellite applications for space based astronomy and earth observations which include visible imaging, spectroscopy and star-tracking etc. Apart from this, A/D conversion is the perfect solution for high-resolution scientific, medical, industrial applications because it has characteristics of high precision, better accuracy, higher sensitivity and linear dynamic range. ADC’s are being used for onboard/satellite applications as it provides high linearity, lower noise and higher dynamic range in CCD and CMOS detectors. An efficient ADC helps in reducing the overall power consumption in all payload designs. All imaging payloads consist of video processors cards which invariably use an ADC for quantizing signal from the real world sensors. In this work, a 16 bit 5 MS/s pipeline in 0.18μm CMOS technology ADC is designed with the state of art performance. Since designing at sub-micron technologies is highly challenging, a systematic methodology in Matlab is developed to ensure the accuracy and performance of the design while optimizing power consumption to 140 mW. Amplifiers with gain as high as 140 dB and large unity gain bandwidth of 260 MHz has been implemented in this design to take care of its 3.5 bits/stage complexity, high speed comparators with offset in range of micro-volts, switch optimization for accurate residue transfer, stage scaling for power optimization and digital error correction logic implementation are some of the criticalities of this design. Design methodologies which helped in achieving state of art performance, design criticalities and challenges faced during the entire design has been discussed in this report in details.