| dc.contributor.author |
Ojha, Apoorva |
|
| dc.contributor.author |
Parihar, Narendra |
|
| dc.contributor.author |
Mohapatra, Nihar Ranjan |
|
| dc.contributor.other |
2015 29th International Conference on VLSI Design (VLSID) |
|
| dc.coverage.spatial |
Kolkata, IN |
|
| dc.date.accessioned |
2016-04-13T13:33:18Z |
|
| dc.date.available |
2016-04-13T13:33:18Z |
|
| dc.date.issued |
2016-01-04 |
|
| dc.identifier.citation |
Ojha, Apoorva; Parihar, Narendra and Mohapatra, Nihar R., "Analysis and modeling of stress over layer induced threshold voltage shift in HKMG nMOS transistors", in the 2015 29th International Conference on VLSI Design (VLSID), Hotel ITC Sonar, Kolkata, IN, Jan. 4-8, 2016. |
en_US |
| dc.identifier.uri |
https://repository.iitgn.ac.in/handle/123456789/2144 |
|
| dc.description.statementofresponsibility |
by Apoorva Ojha, Narendra Parihar and Nihar R. Mohapatra |
|
| dc.language.iso |
en_US |
en_US |
| dc.publisher |
International Conference on VLSI Design (VLSID) |
en_US |
| dc.subject |
Stress over layer |
en_US |
| dc.subject |
Voltage |
en_US |
| dc.subject |
HKMG |
en_US |
| dc.subject |
nMOS transistor |
en_US |
| dc.title |
Analysis and modeling of stress over layer induced threshold voltage shift in HKMG nMOS transistors |
en_US |
| dc.type |
Article |
en_US |