Soft error resilient and energy efficient dual modular TSPC flip-flop

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dc.contributor.author Gupta, Shubhanshu
dc.contributor.author Mekie, Joycee
dc.contributor.other 32nd International Conference on VLSI Design and 2019 18th International Conference on Embedded Systems (VLSID 2019)
dc.coverage.spatial Delhi, IN
dc.date.accessioned 2019-06-29T06:04:57Z
dc.date.available 2019-06-29T06:04:57Z
dc.date.issued 2019-01
dc.identifier.citation Gupta, Shubhanshu and Mekie, Joycee, "Soft error resilient and energy efficient dual modular TSPC flip-flop", in the 32nd International Conference on VLSI Design and 2019 18th International Conference on Embedded Systems (VLSID 2019), Delhi, IN, Jan. 5-9, 2019. en_US
dc.identifier.uri https://repository.iitgn.ac.in/handle/123456789/4582
dc.description.statementofresponsibility by Shubhanshu Gupta and Joycee Mekie
dc.language.iso en en_US
dc.title Soft error resilient and energy efficient dual modular TSPC flip-flop en_US
dc.type Article en_US


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