dc.contributor.advisor |
Mekie, Joycee |
|
dc.contributor.author |
Barma, Abhishek |
|
dc.date.accessioned |
2019-08-29T09:48:14Z |
|
dc.date.available |
2019-08-29T09:48:14Z |
|
dc.date.issued |
2019 |
|
dc.identifier.citation |
Abhishek, Barma (2019). High performance rediation hardened random access and content addressable memory designs. Gandhinagar: Indian Institute of Technology Gandhinagar, 75p. (Acc. No.: T00421). |
|
dc.identifier.uri |
https://repository.iitgn.ac.in/handle/123456789/4737 |
|
dc.description.statementofresponsibility |
by Abhishek Barma |
|
dc.format.extent |
xi, 75p.: ill.; 30 cm. |
|
dc.language.iso |
en_US |
|
dc.publisher |
Indian Institute of Technology Gandhinagar |
|
dc.subject |
17210024 |
|
dc.subject |
Electrical Engineering |
|
dc.subject |
Robust Circuits |
|
dc.subject |
Particle Strike Immunity |
|
dc.subject |
Dual Port-Dual Interlocked Structure |
|
dc.subject |
Mixed Vt Ternary Content Addressable Memory |
|
dc.title |
High performance rediation hardened random access and content addressable memory designs |
|
dc.type |
Thesis |
|
dc.contributor.department |
Electrical Engineering |
|
dc.description.degree |
M.Tech. |
|