Redundant ADC design and mismatch compansation with calibration

dc.contributor.advisor	Mohapatra, Nihar Ranjan
dc.contributor.author	M, Yadukrishnan
dc.date.accessioned	2019-08-29T09:48:14Z
dc.date.available	2019-08-29T09:48:14Z
dc.date.issued	2019
dc.identifier.citation	Yadukrishnan, M (2019). Redundant ADC design and mismatch compansation with calibration. Gandhinagar: Indian Institute of Technology Gandhinagar, 65p. (Acc. No.: T00482).
dc.identifier.uri	https://repository.iitgn.ac.in/handle/123456789/4748
dc.description.statementofresponsibility	by Yadukrishnan M
dc.format.extent	vii, 65p.: ill.; 30 cm.
dc.language.iso	en_US
dc.publisher	Indian Institute of Technology Gandhinagar
dc.subject	17210119
dc.subject	Electrical Engineering
dc.subject	Calibration Techniques
dc.subject	Compensation Techniques
dc.subject	Quantization Noise
dc.subject	Digital Error Correction
dc.title	Redundant ADC design and mismatch compansation with calibration
dc.type	Thesis
dc.contributor.department	Electrical Engineering
dc.description.degree	M.Tech.