Robust and high-performance 12-T interlocked SRAM for in-memory computing

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dc.contributor.author Surana, Neelam
dc.contributor.author Lavania, Mili
dc.contributor.author Barma, Abhishek
dc.contributor.author Mekie, Joycee
dc.contributor.other 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)
dc.coverage.spatial Grenoble, FR
dc.date.accessioned 2020-07-20T06:02:29Z
dc.date.available 2020-07-20T06:02:29Z
dc.date.issued 09-03-20
dc.identifier.citation Surana, Neelam; Lavania, Mili; Barma, Abhishek and Mekie, Joycee, "Robust and high-performance 12-T interlocked SRAM for in-memory computing", in the 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), Grenoble, FR, Mar. 9-13, 2020. en_US
dc.identifier.uri https://repository.iitgn.ac.in/handle/123456789/5558
dc.description.statementofresponsibility by Neelam Surana, Mili Lavania, Abhishek Barma and Joycee Mekie
dc.language.iso en_US en_US
dc.title Robust and high-performance 12-T interlocked SRAM for in-memory computing en_US
dc.type Article en_US


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