Deep learning assisted accelerated analysis of interconnects for high performance ICs

dc.contributor.advisor	Hegde, Ravi S.
dc.contributor.author	Sujatha, J.
dc.date.accessioned	2021-10-27T14:12:41Z
dc.date.available	2021-10-27T14:12:41Z
dc.date.issued	2020
dc.identifier.citation	Sujatha, J (2020). Deep learning assisted accelerated analysis of interconnects for high performance ICs. Gandhinagar: Indian Institute of Technology Gandhinagar, 58p. (Acc. No.: T00848).
dc.identifier.uri	https://repository.iitgn.ac.in/handle/123456789/7139
dc.description.statementofresponsibility	by Sujatha J.
dc.format.extent	x, 58p.: ill.; hbk.; 30cm.
dc.language.iso	en_US
dc.publisher	Indian Institute of Technology Gandhinagar
dc.subject	18250014
dc.subject	Single conductor Microstrip Transmission Line -- SMTL
dc.subject	Coupled Microstrip Transmission Line -- CMTL
dc.subject	Integrated Circuit
dc.subject	DNN Training and Testing
dc.subject	Power Management/Power Integrity
dc.subject	Clock Synchronization
dc.title	Deep learning assisted accelerated analysis of interconnects for high performance ICs
dc.type	Thesis
dc.contributor.department	Electrical Engineering
dc.description.degree	M.Tech