Synchronous to asynchronous conversion for non-linear pipelined processor

dc.contributor.advisor	Mekie, Joycee
dc.contributor.author	Shah, Smit
dc.date.accessioned	2021-10-27T14:12:42Z
dc.date.available	2021-10-27T14:12:42Z
dc.date.issued	2021
dc.identifier.citation	Shah, Smit (2021). Synchronous to asynchronous conversion for non-linear pipelined processor. Gandhinagar: Indian Institute of Technology Gandhinagar, 71p. (Acc. No.: T00884)
dc.identifier.uri	https://repository.iitgn.ac.in/handle/123456789/7175
dc.description.statementofresponsibility	by Smit Shah
dc.format.extent	xiv, 71p.: ill.; hbk.; 30 cm.
dc.language.iso	en_US
dc.publisher	Indian Institute of Technology Gandhinagar
dc.subject	19210108
dc.subject	Electrical Engineering
dc.subject	Processor Designs
dc.subject	Nuclear Science
dc.subject	Asynchronous Circuits
dc.subject	Asynchronous VLSI
dc.subject	Soft Error
dc.title	Synchronous to asynchronous conversion for non-linear pipelined processor
dc.type	Thesis
dc.contributor.department	Electrical Engineering
dc.description.degree	M.Tech