Development of a scalable substrate current model for LDMOS transistor

dc.contributor.advisor	Mohapatra, Nihar Ranjan
dc.contributor.author	Dan, Virender
dc.date.accessioned	2021-10-27T14:12:42Z
dc.date.available	2021-10-27T14:12:42Z
dc.date.issued	2021
dc.identifier.citation	Dan, Virender (2021). Development of a scalable substrate current model for LDMOS transistor. Gandhinagar: Indian Institute of Technology Gandhinagar, 54p. (Acc. No.: T00887).
dc.identifier.uri	https://repository.iitgn.ac.in/handle/123456789/7178
dc.description.statementofresponsibility	by Virender Dan
dc.format.extent	xii, 54p.: ill.; hbk.; 30 cm.
dc.language.iso	en_US
dc.publisher	Indian Institute of Technology Gandhinagar
dc.subject	19210113
dc.subject	Electrical Engineering
dc.subject	Electron Devices
dc.subject	Circuit Simulation
dc.subject	Semiconductor Devices
dc.subject	ldmos Transistor
dc.subject	Integrated Circuit Technology
dc.subject	LDMOS Transistor
dc.title	Development of a scalable substrate current model for LDMOS transistor
dc.type	Thesis
dc.contributor.department	Electrical Engineering
dc.description.degree	M.Tech