Mixed-8T: energy-efficient configurable mixed-VTSRAM design techniques for neural networks

Show simple item record

dc.contributor.author Surana, Neelam
dc.contributor.author Bharti, Pramod Kumar
dc.contributor.author Tej, Bachu Varun
dc.contributor.author Mekie, Joycee
dc.contributor.other 35th International Conference on VLSI Design and 21st International Conference on Embedded Systems (VLSID 2022)
dc.coverage.spatial Bangalore, IN
dc.date.accessioned 2022-11-01T08:45:01Z
dc.date.available 2022-11-01T08:45:01Z
dc.date.issued 26-02-22
dc.identifier.citation Surana, Neelam; Bharti, Pramod Kumar; Tej, Bachu Varun and Mekie, Joycee, "Mixed-8T: energy-efficient configurable mixed-VTSRAM design techniques for neural networks", in the 35th International Conference on VLSI Design and 21st International Conference on Embedded Systems (VLSID 2022), Bangalore, IN, Feb. 26-Mar. 02, 2022. en_US
dc.identifier.uri https://repository.iitgn.ac.in/handle/123456789/8273
dc.description.statementofresponsibility by Neelam Surana, Pramod Kumar Bharti, Bachu Varun Tej and Joycee Mekie
dc.language.iso en_US en_US
dc.title Mixed-8T: energy-efficient configurable mixed-VTSRAM design techniques for neural networks en_US
dc.type Conference Paper en_US


Files in this item

Files Size Format View

There are no files associated with this item.

This item appears in the following Collection(s)

Show simple item record

Search Digital Repository


Browse

My Account