An automated approach to compare bit serial and bit parallel in-memory computing for DNNs

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dc.contributor.author Parmar, Alok
dc.contributor.author Prasad, Kailash
dc.contributor.author Rao, Nanditha
dc.contributor.author Mekie, Joycee
dc.contributor.other IEEE International Symposium on Circuits and Systems (ISCAS 2022)
dc.coverage.spatial Austin, US
dc.date.accessioned 2022-12-16T14:53:41Z
dc.date.available 2022-12-16T14:53:41Z
dc.date.issued 2022-05-27
dc.identifier.citation Parmar, Alok; Prasad, Kailash; Rao, Nanditha and Mekie, Joycee, "An automated approach to compare bit serial and bit parallel in-memory computing for DNNs", in the IEEE International Symposium on Circuits and Systems (ISCAS 2022), Austin, US, May 27- Jun. 1, 2022. en_US
dc.identifier.uri https://repository.iitgn.ac.in/handle/123456789/8379
dc.description.statementofresponsibility by Alok Parmar, Kailash Prasad, Nanditha Rao and Joycee Mekie
dc.language.iso en_US en_US
dc.title An automated approach to compare bit serial and bit parallel in-memory computing for DNNs en_US
dc.type Conference Paper en_US


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