| dc.contributor.author |
Issac, Tom Glint |
|
| dc.contributor.author |
Prasad, Kailash |
|
| dc.contributor.author |
Dagli, Jinay |
|
| dc.contributor.author |
Gandhi, Krishil |
|
| dc.contributor.author |
Gupta, Aryan |
|
| dc.contributor.author |
Patel, Vrajesh |
|
| dc.contributor.author |
Shah, Neel |
|
| dc.contributor.author |
Mekie, Joycee |
|
| dc.contributor.other |
28th Asia and South Pacific Design Automation Conference (ASPDAC 2023) |
|
| dc.coverage.spatial |
Japan |
|
| dc.date.accessioned |
2023-02-09T14:23:48Z |
|
| dc.date.available |
2023-02-09T14:23:48Z |
|
| dc.date.issued |
2023-01-16 |
|
| dc.identifier.citation |
Issac, Tom Glint; Prasad, Kailash; Dagli, Jinay; Gandhi, Krishil; Gupta, Aryan; Patel, Vrajesh; Shah, Neel and Mekie, Joycee, "Hardware-software codesign of DNN accelerators using approximate posit multipliers", in the 28th Asia and South Pacific Design Automation Conference (ASPDAC 2023), Tokyo, JP, Jan. 16-19, 2023. |
en_US |
| dc.identifier.uri |
https://repository.iitgn.ac.in/handle/123456789/8561 |
|
| dc.description.statementofresponsibility |
by Tom Glint Issac, Kailash Prasad, Jinay Dagli, Krishil Gandhi, Aryan Gupta, Vrajesh Patel, Neel Shah and Joycee Mekie |
|
| dc.language.iso |
en_US |
en_US |
| dc.title |
Hardware-software codesign of DNN accelerators using approximate posit multipliers |
en_US |
| dc.type |
Conference Paper |
en_US |