PIC-RAM: process-invariant capacitive multiplier based analog in memory computing in 6T SRAM

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dc.contributor.author Prasad, Kailash
dc.contributor.author Biswas, Aditya
dc.contributor.author Kabra, Arpita
dc.contributor.author Mekie, Joycee
dc.contributor.other Design, Automation and Test in Europe Conference (DATE 2023)
dc.coverage.spatial Belgium
dc.date.accessioned 2023-07-04T07:45:11Z
dc.date.available 2023-07-04T07:45:11Z
dc.date.issued 2023-04-17
dc.identifier.citation Prasad, Kailash; Biswas, Aditya; Kabra, Arpita and Mekie, Joycee, “PIC-RAM: process-invariant capacitive multiplier based analog in memory computing in 6T SRAM”, in the Design, Automation & Test in Europe Conference & Exhibition (DATE 2023), Antwerp, BE, Apr. 17-19, 2023.
dc.identifier.uri https://repository.iitgn.ac.in/handle/123456789/8921
dc.description.statementofresponsibility by Kailash Prasad, Aditya Biswas, Arpita Kabra and Joycee Mekie
dc.language.iso en_US
dc.title PIC-RAM: process-invariant capacitive multiplier based analog in memory computing in 6T SRAM
dc.type Conference Paper


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