PVC-RAM: process variation aware charge domain in-memory computing 6T-SRAM for DNNs

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dc.contributor.author Shubham, Sai
dc.contributor.author Pandit, Shubham
dc.contributor.author Prasad, Kailash
dc.contributor.author Mekie, Joycee
dc.contributor.other 60th ACM/IEEE Design Automation Conference (DAC 2023)
dc.coverage.spatial United States of America
dc.date.accessioned 2023-09-27T11:15:54Z
dc.date.available 2023-09-27T11:15:54Z
dc.date.issued 2023-09-07
dc.identifier.citation Shubham, Sai; Pandit, Shubham; Prasad, Kailash and Mekie, Joycee, "PVC-RAM: process variation aware charge domain in-memory computing 6T-SRAM for DNNs", in the 60th ACM/IEEE Design Automation Conference (DAC 2023), San Francisco, US, Jul. 09-13, 2023.
dc.identifier.uri https://doi.org/10.1109/DAC56929.2023.10247893
dc.identifier.uri https://repository.iitgn.ac.in/handle/123456789/9211
dc.description.abstract This work introduces PVC-RAM, a process variation aware in-memory computing (IMC) static random-access memory (SRAM) macro designed for efficient convolutional neural network (CNN) inference. PVC-RAM is a charge-domain based compact IMC and is the first fully analog IMC for 4b-weights/4b-inputs MAC operation for deep neural networks in 6T-SRAM to the best of our knowledge. Further, PVC-RAM fully computes 4-bit MAC in the analog domain and requires fewer invocations of the ADCs. Implemented in 28nm technology, PVC-RAM achieves a bitwise throughput of 6964.48 TOPS, which is 1.5 higher than the SOTA, and a bitwise energy efficiency of 75.12 TOPS/W, which is 1.3 higher than the SOTA.
dc.description.statementofresponsibility by Sai Shubham, Shubham Pandit, Kailash Prasad and Joycee Mekie
dc.language.iso en_US
dc.subject Knowledge engineering
dc.subject Power demand
dc.subject Fluctuations
dc.subject Design automation
dc.subject Random access memory
dc.subject Linearity
dc.subject In-memory computing
dc.title PVC-RAM: process variation aware charge domain in-memory computing 6T-SRAM for DNNs
dc.type Conference Paper


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