dc.contributor.advisor |
Mekie, Joycee |
|
dc.contributor.author |
Mittapalli, Yaswanth Ram |
|
dc.date.accessioned |
2023-09-27T14:42:58Z |
|
dc.date.available |
2023-09-27T14:42:58Z |
|
dc.date.issued |
2023 |
|
dc.identifier.citation |
Mittapalli, Yaswanth Ram (2023). IMC-SIM: an automated tool to benchmark different In-memory computing architectures. Gandhinagar: Indian Institute of Technology Gandhinagar, 96p. (Acc. No.: T01108). |
|
dc.identifier.uri |
https://repository.iitgn.ac.in/handle/123456789/9306 |
|
dc.description.statementofresponsibility |
by Yaswanth Ram Mittapalli |
|
dc.format.extent |
xiv, 96p.: hbk.; 30 cm |
|
dc.language.iso |
en_US |
|
dc.publisher |
Indian Institute of Technology Gandhinagar |
|
dc.subject |
21210037 |
|
dc.subject |
In-memory Computing |
|
dc.subject |
IMC-Sim |
|
dc.subject |
IMC Architecture |
|
dc.subject |
Bit-serial Architecture |
|
dc.subject |
Bit-parallel Architecture |
|
dc.title |
IMC-SIM: an automated tool to benchmark different In-memory computing architectures |
|
dc.type |
Thesis |
|
dc.contributor.department |
Electrical Engineering |
|
dc.description.degree |
M.Tech |
|