Abstract:
In this paper, Silicon-on-Insulator (SOI) MOSFET for capacitor-less in-memory computing (IMC) is proposed to demonstrate logical operations. A methodology is presented using 3 SOI MOSFETs to realize AND/OR logic operations using one of the SOI MOSFETs as a selector between AND/OR operations. The band-to-band tunneling physics-based charge storage in a sub-threshold regime allows energy-efficient data storage. The proposed capacitor-less architecture along with the high energy-efficiency has the potential to realize large-scale implementation of hardware IMC.