Design of vertical PNP transistor with beta greater than 50 using SCL's 180nm CMOS technology

Abstract

Analog circuits are integral part of electronic system. They are being used for high voltage purpose and for interfacing to the outside world. Currently, CMOS transistors comprise most of the electronic product. But then also the importance of bipolar devices is retained due to their superior performance in analog circuit application. In general, bipolar devices are used in generating bandgap reference current source. An ideal bandgap reference current source demands high DC current gain. The DC current gain (beta) usually has a value greater than 50 corresponding to the common base current gain more than 0.98. In this work, we optimized the design of VPNP transistor for high DC current gain. Currently the existing PNP transistor at SCL Chandigarh provides beta of 2.57. This thesis work focuses on to achieve beta greater than 50 without increasing process complexity. We achieved beta of 93.165 in our optimized final VPNP transistor structure. We proposed the structure, taking care that at each step of fabrication, mask can be reused so that the design becomes cost effective. Before finalising the structure, parametric analysis has been done to check the effect of doping and dimensions on the currents and so on beta.