| dc.contributor.author |
Gupta, Amratansh |
|
| dc.contributor.author |
Ganeriwala, Mohit D. |
|
| dc.contributor.author |
Mohapatra, Nihar Ranjan |
|
| dc.contributor.other |
32nd International Conference on VLSI Design and 2019 18th International Conference on Embedded Systems (VLSID 2019) |
|
| dc.coverage.spatial |
Delhi, IN |
|
| dc.date.accessioned |
2019-06-29T06:04:57Z |
|
| dc.date.available |
2019-06-29T06:04:57Z |
|
| dc.date.issued |
2019-01 |
|
| dc.identifier.citation |
Gupta, Amratansh; Ganeriwala, Mohit D. and Mohapatra, Nihar Ranjan, "An unified charge centroid model for silicon and low effective mass III-V channel double gate MOS transistors", in the 32nd International Conference on VLSI Design and 2019 18th International Conference on Embedded Systems (VLSID 2019), Delhi, IN, Jan. 5-9, 2019. |
en_US |
| dc.identifier.uri |
https://repository.iitgn.ac.in/handle/123456789/4581 |
|
| dc.description.statementofresponsibility |
by Amratansh Gupta, Mohit D. Ganeriwala and Nihar Ranjan Mohapatra |
|
| dc.language.iso |
en |
en_US |
| dc.title |
An unified charge centroid model for silicon and low effective mass III-V channel double gate MOS transistors |
en_US |
| dc.type |
Article |
en_US |